Staff SoC Verification Engineer (S)

Reference: qcssaqeq81m24d6cs2d2

We are seeking a dedicated and skilled Staff SoC Verification Engineer (S) to join our dynamic team. In this role, you will be responsible for leading and executing verification strategies for complex System on Chip (SoC) designs. You will work closely with design and architecture teams to develop comprehensive verification plans, ensuring that our products meet the highest quality standards. Your expertise will be crucial in defining and implementing functional verification environments using advanced methodologies such as UVM (Universal Verification Methodology) and SystemVerilog. You will also be responsible for developing testbenches, creating verification IP, and conducting rigorous simulations to validate design functionality.

The ideal candidate will have a strong background in digital design and verification, with hands-on experience in both RTL and gate-level verification. You should possess a deep understanding of SoC architecture and be proficient in using tools such as ModelSim, VCS, or Cadence. Excellent problem-solving skills and the ability to work collaboratively in a fast-paced environment are essential. A Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field is required, along with a minimum of 5 years of industry experience in SoC verification. You will also mentor junior engineers, driving continuous improvement in our verification processes and methodologies.

If you are passionate about pushing the boundaries of technology and thrive in an innovative environment, we would love to hear from you. Join us in shaping the future of SoC design and verification!

COMPETITIVE SALARY

London

Permanent

Added 04/03/2026
Reference: qcssaqeq81m24d6cs2d2

Staff SoC Verification Engineer (S)

London
Permanent

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